There´s a problem with the TI PCI1220 socket controller
on the Sycard PCChost1200 PCI-CardBus Host Adapter when
using the current version 3.1.4 of the PCMCIA package:
The sockets are not powered up after the insertion of a
PC Card. This is due to the fact that the on board power
switch does not receive a clock signal. In order to solve
this problem, the P2CCLK Bit (#27) in the TI1220´s System
Control Register (offset 80h) must be set. When this bit
is set, the power switch clock is generated by the PCI
clock and driven by the TI PCI1220.
The following changes are required in the PCMCIA software:
Add a bit definition for the P2CCLK bit in the file
"pcmcia-cs-3.14/modules/ti113x.h":
...
/* System Control Register */
#define TI113X_SYSTEM_CONTROL 0x0080 /* 32 bit */
#define TI113X_SCR_SMIROUTE 0x04000000
#define TI113X_SCR_SMISTATUS 0x02000000
#define TI113X_SCR_SMIENB 0x01000000
#define TI113X_SCR_VCCPROT 0x00200000
#define TI113X_SCR_REDUCEZV 0x00100000
#define TI113X_SCR_CDREQEN 0x00080000
#define TI113X_SCR_CDMACHAN 0x00070000
#define TI113X_SCR_SOCACTIVE 0x00002000
#define TI113X_SCR_PWRSTREAM 0x00000800
#define TI113X_SCR_DELAYUP 0x00000400
#define TI113X_SCR_DELAYDOWN 0x00000200
#define TI113X_SCR_INTERROGATE 0x00000100
#define TI113X_SCR_CLKRUN_SEL 0x00000080
#define TI113X_SCR_PWRSAVINGS 0x00000040
#define TI113X_SCR_SUBSYSRW 0x00000020
#define TI113X_SCR_CB_DPAR 0x00000010
#define TI113X_SCR_CDMA_EN 0x00000008
#define TI113X_SCR_ASYNC_IRQ 0x00000004
#define TI113X_SCR_KEEPCLK 0x00000002
#define TI113X_SCR_CLKRUN_ENA 0x00000001
#define TI122X_SCR_SER_STEP 0xc0000000
#define TI122X_SCR_INTRTIE 0x20000000
/*-- Changes for TI1220 by Patrick Osterloh on 11/28/99 -- */
#define TI122X_SCR_P2CCLK 0x08000000
/*-------------------------------------------------------- */
#define TI122X_SCR_CBRSVD 0x00400000
#define TI122X_SCR_MRBURSTDN 0x00008000
#define TI122X_SCR_MRBURSTUP 0x00004000
#define TI122X_SCR_RIMUX 0x00000001
...
Then adjust the "ti113x_set_opts" function within the module
"pcmcia-cs-3.14/modules/i82365.c" as follows:
...
static u_int __init ti113x_set_opts(u_short s, char *buf)
{
socket_info_t *t = &socket[s];
ti113x_state_t *p = &t->state.ti113x;
u_int mask = 0xffff;
int old = (t->type <= IS_TI1131);
/*-- Changes for TI1220 by Patrick Osterloh on 11/28/99 --*/
int p2c_patch = (t->type == IS_TI1220);
/*--------------------------------------------------------*/
flip(p->sysctl, TI113X_SCR_CLKRUN_ENA, has_clkrun);
flip(p->sysctl, TI113X_SCR_CLKRUN_SEL, clkrun_sel);
flip(p->cardctl, TI113X_CCR_RIENB, has_ring);
p->cardctl &= ~TI113X_CCR_ZVENABLE;
switch (irq_mode) {
case 1:
p->devctl &= ~TI113X_DCR_IMODE_MASK;
p->devctl |= TI113X_DCR_IMODE_ISA;
break;
case 2:
p->devctl &= ~TI113X_DCR_IMODE_MASK;
p->devctl |= TI113X_DCR_IMODE_SERIAL;
break;
case 3:
p->devctl &= ~TI113X_DCR_IMODE_MASK;
p->devctl |= TI12XX_DCR_IMODE_ALL_SERIAL;
break;
default:
if ((p->devctl & TI113X_DCR_IMODE_MASK) == 0)
p->devctl |= TI113X_DCR_IMODE_ISA;
}
if (p->cardctl & TI113X_CCR_RIENB) {
strcat(buf, " [ring]");
if (old) mask &= ~0x8000;
}
if (old && (p->sysctl & TI113X_SCR_CLKRUN_ENA)) {
if (p->sysctl & TI113X_SCR_CLKRUN_SEL) {
strcat(buf, " [clkrun irq 12]");
mask &= ~0x1000;
} else {
strcat(buf, " [clkrun irq 10]");
mask &= ~0x0400;
}
}
if (p->sysctl & TI113X_SCR_PWRSAVINGS)
strcat(buf, " [pwr save]");
/*-- Changes for TI1220 by Patrick Osterloh on 11/28/99--*/
if (p2c_patch)
p->sysctl |= TI122X_SCR_P2CCLK;
/*-------------------------------------------------------*/
switch (p->devctl & TI113X_DCR_IMODE_MASK) {
case TI12XX_DCR_IMODE_PCI_ONLY:
strcat(buf, " [pci only]");
mask = 0;
break;
case TI113X_DCR_IMODE_ISA:
strcat(buf, " [isa irq]");
if (old) mask &= ~0x0018;
break;
case TI113X_DCR_IMODE_SERIAL:
strcat(buf, " [pci + serial irq]");
mask = 0xffff;
break;
case TI12XX_DCR_IMODE_ALL_SERIAL:
strcat(buf, " [serial pci & irq]");
mask = 0xffff;
break;
}
return mask;
}
...
That´s all! Don´t forget to recompile and reinstall!
Patrick
--
Patrick Osterloh
Chair of Electrical Engineering and Computer Systems (EECS)
University of Technology RWTH Aachen
phone: +49-241-807588
fax: +49-241-8888-282
email: osterloh@eecs.rwth-aachen.de
|
[ Edit This Forum ]