Hi Ingo,
i think i found what was causing this. Apparently, the collision detection uses a different register for its setup.
This one attempts to set up the collision detection as well. However, i only tested 10 MBit/s Half duplex this time.
Cheers,
Jochen
#include <sys/types.h>
#include <sys/socket.h>
#include <sys/ioctl.h>
#include <sys/io.h>
#include <net/if.h>
#include <stdio.h>
#include <errno.h>
#include <stdlib.h>
#include <string.h>
#include <unistd.h>
inline unsigned char
inb (unsigned short port)
{
unsigned char _v;
__asm__ __volatile__ ("inb %w1,%0":"=a" (_v):"Nd" (port));
return _v;
}
inline void
outb (unsigned char value, unsigned short port)
{
__asm__ __volatile__ ("outb %b0,%w1"::"a" (value), "Nd" (port));
}
static int sockets_open(void)
{
int sock;
if ((sock = socket(AF_INET, SOCK_DGRAM, 0)) != -1)
return sock;
else if ((sock = socket(AF_IPX, SOCK_DGRAM, 0)) != -1)
return sock;
else if ((sock = socket(AF_AX25, SOCK_DGRAM, 0)) != -1)
return sock;
else
return socket(AF_APPLETALK, SOCK_DGRAM, 0);
}
void write_bit(int port, int bit)
{
outb((bit << 6) + 0x20, port);
usleep(1);
outb((bit << 6) + 0xa0, port);
usleep(1);
outb((bit << 6) + 0x20, port);
}
int read_bit(int port)
{
int i;
outb(0, port);
usleep(1);
outb(0x80, port);
usleep(1);
i = inb(port);
outb(0, port);
return (i & 0x10) >> 4;
}
void reset(int port)
{
outb(0x08, port);
usleep(1);
outb(0x0C, port);
usleep(1);
outb(0x08, port);
usleep(1);
outb(0x0C, port);
outb(0x00, port);
}
int reada(int port, int adr)
{
int i,j;
for (i=0; i<0x20; i++)
write_bit(port, 1);
write_bit(port, 0);
write_bit(port, 1);
write_bit(port, 1);
write_bit(port, 0);
write_bit(port, 0);
write_bit(port, 0);
write_bit(port, 0);
write_bit(port, 0);
write_bit(port, 0);
write_bit(port, (adr & 0x10) >> 4);
write_bit(port, (adr & 0x08) >> 3);
write_bit(port, (adr & 0x04) >> 2);
write_bit(port, (adr & 0x02) >> 1);
write_bit(port, (adr & 0x01) >> 0);
j = read_bit(port);
if (j == 1)
j = read_bit(port);
for (i=0; i<16; i++) {
j = (j << 1) + read_bit(port);
}
write_bit(port, 1);
return j;
}
int writea(int port, int adr, int val)
{
int i,j;
for (i=0; i<0x20; i++)
write_bit(port, 1);
write_bit(port, 0);
write_bit(port, 1);
write_bit(port, 0);
write_bit(port, 1);
write_bit(port, 0);
write_bit(port, 0);
write_bit(port, 0);
write_bit(port, 0);
write_bit(port, 0);
write_bit(port, (adr & 0x10) >> 4);
write_bit(port, (adr & 0x08) >> 3);
write_bit(port, (adr & 0x04) >> 2);
write_bit(port, (adr & 0x02) >> 1);
write_bit(port, (adr & 0x01) >> 0);
write_bit(port, 1);
write_bit(port, 0);
write_bit(port, (val & 0x8000) >> 15);
write_bit(port, (val & 0x4000) >> 14);
write_bit(port, (val & 0x2000) >> 13);
write_bit(port, (val & 0x1000) >> 12);
write_bit(port, (val & 0x0800) >> 11);
write_bit(port, (val & 0x0400) >> 10);
write_bit(port, (val & 0x0200) >> 9);
write_bit(port, (val & 0x0100) >> 8);
write_bit(port, (val & 0x0080) >> 7);
write_bit(port, (val & 0x0040) >> 6);
write_bit(port, (val & 0x0020) >> 5);
write_bit(port, (val & 0x0010) >> 4);
write_bit(port, (val & 0x0008) >> 3);
write_bit(port, (val & 0x0004) >> 2);
write_bit(port, (val & 0x0002) >> 1);
write_bit(port, (val & 0x0001) >> 0);
write_bit(port, 1);
return 0;
}
void main(int argc, char **argv)
{
int skfd, i, sub, filter;
struct ifreq ifr;
skfd = sockets_open();
if (skfd == -1) {
perror("socket");
exit(1);
}
strcpy(ifr.ifr_name, argv[1]);
if (ioctl(skfd, SIOCGIFMAP, &ifr) < 0) {
perror("ioctl");
exit(1);
}
i = atoi(argv[2]);
switch(i) {
case 0:
sub = 0x0000;
filter = 0;
break;
case 1:
sub = 0x0100;
filter = 4;
break;
case 2:
sub = 0x2000;
filter = 0;
break;
default:
sub = 0x2100;
filter = 4;
break;
}
ioperm(ifr.ifr_map.base_addr+0x1c, 2, 1);
reset(ifr.ifr_map.base_addr+0x1c);
writea(ifr.ifr_map.base_addr+0x1c, 0, 0x8000);
writea(ifr.ifr_map.base_addr+0x1c, 0, sub);
outb(filter, ifr.ifr_map.base_addr+0x1d);
close(skfd);
exit(0);
}
|