IFLASH2_MTD

NAME

SYNOPSIS

DESCRIPTION

In addition to backwards compatibility with Series 2 flash devices, Series 2+ devices provide fast page-mode transfers, which allow sequential flash writes to proceed in the background without active monitoring. While faster than Series 2 cards in actual write speeds, this means that Series 2+ cards also do not tie up the host processor while writes are in progress.  

PARAMETERS

pc_debug=n

Selects the PCMCIA debugging level. This parameter is only available if the module is compiled with debugging enabled. A non-zero value enables debugging.

mem_speed=n

Sets the access speed of shared memory windows, in nanoseconds. The default is 0 (i.e., no extra wait states). Values of up to 1000 are legal.

word_width=n

A flag indicating if memory windows should be configured for 8-bit (if 0) or 16-bit (if 1) transfers. The default is 1 (16-bit).

vpp_timeout_period=n

In milliseconds, this specifies the maximum idle period after a write operation before programming power will be switched off. The default is 1000 ms.

vpp_settle=n

In milliseconds, this gives a delay between when programming power is switched on, and when the device is assumed to be powered up and ready to receive erase or write commands. The default is 100 ms.

write_timeout=n

In milliseconds, specifies the maximum elapsed time for a page write (256 words) before it times out. The default is 100 ms.

erase_timeout=n

In milliseconds, specifies the poll interval for monitoring the status of a bulk erase operation. The default is 100 ms.

erase_limit=n

In milliseconds, specifies the maximum elapsed time before an erase operation is assumed to have failed. The default is 10000 ms.

retry_limit=n

The maximum number of retries for a write operation. The default is 4.

max_tries=n

The maximum number of status register polls before various commands are assumed to have timed out. The default is 4096.

AUTHOR

SEE ALSO

Index

NAME

SYNOPSIS

DESCRIPTION

PARAMETERS

AUTHOR

SEE ALSO